IP Design
Architecture, Specification and Micro-Architecture development
Reusable RTL Design for Low Power, Minimum Area and Maximum Speed
Synthesis, Timing Clean RTL, CDC, LINT
Verilog, VHDL, System Verilog
SOC Design
RTL Integration, 3rd Party IP Integration
ARM, ARC, 8 Bit Processors, Starcore
Timing constraints, Low power Clocking, Analog + Digital SOC
FPGA to ASIC Migration, FPGA Prototyping & Validation
Projects Delivered
UFS 2.0 , EMMC, SD USB 3.0 Interlaken ,DDR3.0, PCI Express, AHB, AXI ,MIPI, UniPro, M-PHY, ARM, Bluetooth , Wireless, DVB-H/T , Generic ARC Control Platform
Services
Semiconductor
IP/SOC Design and Verification
Physical Design and Verification
Custom Design and Verification
FPGA Design and Verification
EMBEDDED SYSTEMS
Embedded Development
Device Driver Development
IOT and System Design
Post Silicon Validation
IT/SOFTWARE
Web and Mobile App Development
QA and Test Automation
Cyber Security Managed Support
INCISE IP/SOC VERIFICATION EXPERTISE
IP Verification
System Verilog, UVM, OVM
Specman, TCL, PERL
Constrained Random TB
Assertions, Functional Coverage, Code Coverage, Formal Verification
SOC Verification
C++/C/Assembly Based Verification
System Verilog, UVM, OVM
Gate Level Verification
System Level Verification/ FPGA Verification
Coverage Driven
Projects Delivered
UFS 2.0 , EMMC, SD USB 3.0 Interlaken ,DDR3.0, PCI Express, AHB, AXI ,MIPI, UniPro, M-PHY, ARM, Bluetooth , Wireless, DVB-H/T check here , Generic ARC Control Platform